DSS212S-D5 2U 12 BAYS 3.5" HDD 12G SAS REDUNDANT NODE DUAL XEON SP 1200W HRP
DSS212S-U5 2U 12 Bay 3.5" HDD 12G SAS Redundant Node Single Xeon SP
DSS224S-D5 2U 24 BAYS 2.5" 12G SAS REDUNDANT NODE DUAL XEON SP 1200W HRP
DSS316S-D5 3U 16 BAYS 3.5" HDD 12G SAS REDUNDANT NODE DUAL XEON SP 1200W HRP
DSS424S-D5 4U 24 BAYS 3.5" HDD 12G SAS REDUNDANT NODE DUAL XEON SP 1200W HRP
DSS448S-D5 4U 48 Bays SAS Dual Intel Xeon
DSS424S-D5 4U 24 BAYS 3.5" HDD 12G SAS REDUNDANT NODE DUAL XEON SP 1200W HRP
Key Features
- Storage server supports Dual Intel Xeon SP Skylake up to 1.5 TB DDR4 RAM
- Four hot-swappable 60mm fan modules per motherboard module
- Support two hot-swap MB modules each with Xeon DP server boards in one system as unified redundant controllers
- HA Redundant Cluster-in-a-box solution with PCIe NTB and GigE heartbeat
Model:
DSS424S-D5-4U-24-BAYSCertifications:
Specification
System | |
---|---|
Processor | Each Node: Supports Single Socket Intel® Xeon® P Skylake up to 205W TDP socket LGA3647 |
System Chipset | Intel C621 chipset |
System Memory | Each node: Supports up to 12x DIMMs DDR4 RDIMM/RDIMM 3DS/LRDIMM/LRDIMM 3DS 2666 |
Storage | Each node: 36 ports 12G SAS Expander with 3 SFF8643 Connectors |
Driver Bays | 24 hot-swap 3.5" 12G/6G SAS/SATA drive bay Each node: 2x internal 2.5" 7mm for OS drive bays |
Cooling | Each node: 4x 60mm fans |
Expansion | Each node: 2x PCIe Gen3 x16 slots; 5x PCIe Gen3 x8 slots |
Environment | |
Operating Temperature | 0°C ~ 35°C |
Storage Temperature | -20°C ~ 70°C |
Relative Humidity | 5% ~ 95% relative humidity, non-condensing |
HTS Code | 8473 30 5100 |
ECCN | 4A994 |
Compliance | CE, FCC Class A, RoHS 6/6 compliant |
Physical | |
Dimension | System: 27"x19"x7" (LxWxH) Packaging: 38“x25.2"x18"(LxWxH) |
Weights | Gross Weight: 51.78kg/114lbs, Net Weight: 33.9kg/75lbs |
Resources
AVL |
DSS424S-D5-AVL.pdf
|
BIOS |
Tyan S7100GM2NRS7100GM2NR_v100.zipS7100GM2NR-BMC_v100.zip |
Data Sheet |
DSS424S-D5.pdf
|
Install Guide |
DSS424SF-D5-Quick-Guide-v1.00.pdf
|
Product Brief |
PB_DuraStreams_Intel.pdf
|